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200mm TSV Cu CMP Test Patterned Wafers With 20µm and 50µm Si Trench Depth (SKW6-TSV4-20µ and SKW6-TSV4-50µ), March 2010
For further details,
please contact SKW Associates at (408) 919-0094 or skw@testwafer.com.
200mm TSV Test Patterned Wafer For Backside Si Layer Thinning Process Optimization (SKW6-TSV4G-20µ), March 2010
For further details,
please contact SKW Associates at (408) 919-0094 or skw@testwafer.com.
300mm TSV Cu CMP Patterned Wafers (SKW6-TSV3-2 and SKW6-TSV3-NT), October 2009
For further details,
please click here.
Updated Wafer Product List For Both 200mm and 300mm
Blanket and Patterned Wafers, July 2009
For updated wafer
product list (for both 200mm and 300mm blanket and patterned wafers),
please click here.
200mm TSV Cu CMP Test Patterned wafer ( SKW6-TSV3), July
2009
Through silicon vias
(TSV's) are a key component in 3-D interconnect. TSV's improve electrical
performance, reduce power consumption and shrink device sizes. Manufacturing
TSV's involves via etching, filling and CMP. New test patterned wafer
(SKW6-TSV3) has been introduced. In this new test patterned wafer, two
major features are: contact arrays (ranges from 10µm
- 200µm)
and line/spacing arrays (ranges from 5µm - 150µm). For further details, please
click here.
200mm GST CMP Test Patterned Wafer (SKW8), July 2009
Phase-change memory
(PCM) is a type of non-volatile computer memory. PCM uses the unique behavior
of chalcogenide glass, which can be "switched" between two states, crystalline
and amorphous, with the application of heat. In order to fabricate the
PCM device with high integration, CMP of thin chalcogenide (Ge2Sb2Te5)
[GST] is required. For optimization of consumable sets, GST blanket and
test patterned wafers have been introduced. We have currently one type
of GST blanket wafer and two different types of GST CMP test patterned
wafers: SKW8O-GST; and SKW8N-GST. Please click here
for further information.
300mm
Cu Test Patterned wafer ( SKW 6-ATR-40), July 2008
New 300mm Cu test
patterned wafers (SKW 6-ATR-40) are introduced. The minimum feature size
of this 65nm technology node wafer is 0.09 µm.
With advanced e-testing features and intelligent dummy additions, these
new types of 300mm test patterned wafers should have various technical
advantages over other types of 65 nm technology node CMP process characterization
and analysis test patterned wafers. We have currently six different types
of ATR-40: ATR-40 Cu/ TEOS; ATR-40 Cu/Coral; ATR-40 Cu/Coral/TEOS cap;
ATR-40 Cu/BDI; ATR-40 Cu/BDI/TEOS cap; and ATR-40 Cu/BDIx/TEOS cap wafers.
Please click on each individual item for further information related to
each new type of Cu CMP patterned wafer.
300mm
W plug patterned wafer ( SKW 5-ATR-35P), July 2008
New 300mm W plug
patterned wafers ( SKW 5-ATR-35P) are introduced. The minimum plug size
ranges from 0.11 µm
to 0.2 µm.
The pattern density is up to 20% (from ~5%). Because of the size of the
plug holes and pattern density variation, proper characterization of post-W
CMP process requires focused-ion-beam(FIB) SEM. Please click here for
the wafer specifications related to this advanced 300mm W plug pattern
wafer.
New
STI CMP Patterned 200mm and 300mm wafers (SKW 3-9), January 2008
New STI CMP patterned
200mm and 300mm wafers are introduced. Our current SKW 3-2 wafers (based
upon MIT test patterned design) have been shown to be fairly ineffective
in the use for advanced STI CMP process characterization. Particularly,
it is quite difficult to carry out end-point-detection(EPD) routine for
SKW 3-2 wafers because of:
1.) too wide pattern
density range (0-100%)
2.) too wide feature size variation (0.5µm-500µm)
In the case of our
new STI CMP test patterned mask(SKW 3-9) wafers, the following modifications
from SKW 3-2 have been made:
1.) die size: 14mm
x 16mm (instead of 20mm x 20mm)
2.) mask consists of 7 columns, each consists of 8 unit blocks (instead
of 5 columns and 5 rows)
3.) size of each feature block: 2mm x 2mm (instead of 4mm x 4mm)
4.) minimum feature size: 0.18µm
(instead of 0.5µm)
5.) logo and alignment marks are located at the bottom unit block of column
6
6.) we added three different types of cell structures ( I-cell, T-cell,
and Z-cell) for defect characterization
In summary, our new SKW 3-9 mask serves the following items:
1 .) CMP dummy design rule test
2 .) Microscratch test (using I-cell, T-cell, and Z-cell)
3 .) Removal Rate and Planarization test
4 .) Slurry Characteristics test
5.) Dishing and Erosion test
6.) Pattern density test with different deposition materials (HDP CVD,
HARP, SOG, BPSG, PSG, CORAL, ¡¦)
7.) Removal with different pad type
8.) EPD ( End Point Detection) capability
9.) SEM view
Currently, we have
one SKW 3-9 200mm product (HDP CVD oxide version) and two 300mm SKW 3-9
products( HDP and HARP CVD oxide versions). Please click
200mm SKW 3-9 HDP CVD, 300mm SKW 3-9 HDP, or 300mm SKW 3-9 HARP wafers
for further information.
New
W Plug patterned 200mm wafer, SKW 5-RSAX, June 2008
New W plug patterned
200mm wafer, SKW 5-RSAX has been introduced. This current W plug patterned
wafer, SKW 5-J085, was introduced about 2 years ago and has been well
received among CMP infrastructure companies. However, this patterned wafer
has a couple of weaknesses. The first weakness is its plug size variation
(only 0.15µm-0.2µm).
The second one is its very narrow plug array patterned density variation
(~5%-7%). Our new W plug patterned 200mm wafer, SKW 5-RSAX, can make up
for these two deficiencies. The plug sizes are 0.2µm
and 0.7µm
and the pattern density variation is 4%-25%. These two factors from SKW
5-RSAX make our new W plug patterned wafer a very valuable addition and
compliment our current SKW 5-J085 wafer product. Please click here for
the wafer specification related to this new 200mm W plug patterned wafer.
New
200mm Cu test patterned wafer (SKW6-6).
Up to now, the most popular Cu CMP test patterned wafer in CMP is Sematech
854 wafer (SKW6-3 Cu CMP test patterned wafer is virtually the same as
Sematech 854 except three or four improvements over Sematech 854). Even
though basic design concept is pretty sound, SEMATECH 854 (or SKW6-3)
is basically designed for checking the effects of pattern density upon
the planarization ability and modeling Cu CMP process. Due to this reason
and because Sematech 754 test pattern is so different from actual device
patterns in chip manufacturing companies, there are needs for the Cu CMP
test patterned wafers which are very similar to actual device patterns
in device manufacturing environment. In order to satisfy this requirement,
we announce new Cu CMP test patterned wafer (SKW6-6). Currently, we have
four different types of SKW6-6:SKW6-6
Cu/TEOS, SKW6-6 Cu/BD,
SKW6-6 Cu/BD/SION
Cap, and SKW6-6 Cu/BD/TEOS.
Please click on each individual name for further information related to
each new type of Cu CMP patterned wafers.
New
300mm Cu Test Patterned Wafer (SKW ATR-35).
New 300mm Cu Test patterned wafers based upon IBM/Novellus developed test
pattern mask are introduced. For further information related to this new
300mm Cu test patterned wafers for 90nm technology mode (potentially can
be extended for 65nm technology mode), please click
here for further information.
New
W Plug Patterned Wafer SKW5-J085
for 90nm Technology Node, November 2005.
This W plug patterned wafer has been designed to characterize planarity
(oxide erosion) for 90 nm technology node. Die size is 32mmx25mm and it
contains various plug areas down to 160nm in diameter. Suggested
metrology guideline for oxide erosion is attached. Minimum design
rule of W plug array is 160nm. Proper characterization tool for oxide
erosion requires focus-ion-beam scanning electron microscopy (FIB/SEM).
Total CMP Characterization Service Business has
been Established, September 2005.
Outsourcing of CMP process analysis and characterization activities has
been popular trend in CMP industry. Using in-house characterization capabilities
and outside technical networks developed during last seven years, SKW
has started total CMP characterization services business starting this
September. For SKW's current
analytical capabilities for this new service business, please refer
to the presentation materials attached. In addition, one
example report based upon our recent service work performed for one
customer in Japan is attached as reference.
New
CMP Test Patterned 300mm Wafers Introduced, January 2005
Nine new CMP test patterned 300mm wafers have recently been introduced
to SKW's current product line. They are: 1.) SKW
7-2; 2.) SKW 3-2;
3.) SKW 3-2C-6700-HDP;
4.) SKW 3-5; 5.) SKW
3-6; 6.) SKW 5-3;
7.) SKW 6-3 Cu/TEOS; 8.)
SKW 6-3Cu/BD; 9.) SKW
6-3 Cu/CORAL. For further information regarding to this product
line, please contact us.
Second
XE-300 Atomic Force Microscope/Atomic Force Profiler (Integrated with
ChampiAn Software), December 2004
Cheil Industries (CMP slurry manufacturer in Korea) has ordered the second
XE-300 Atomic Force Microscope/ Atomic Force Profiler (integrated with
SKW's in-house software, ChampiAn). This system will be used for the profiling
of 90nm/ 65nm technology node test patterned wafers such as SKW 6-3(0.13µm),
SKW 6-5, SKW 5-ICP-A and SKW 5-ICP-K. This system will be delivered by
March 2005.
New W CMP Patterned wafer for 90nm technology node, November 2004
Two new W CMP patterned wafers have been introduced and released. SKW
5-ICP-A(based upon the ATR-30 mask) and SKW
5-ICP-K( based upon the K194 mask) have minimum feature sizes
of 0.14µm and 0.12µm respectively. Using both types of wafers,
edge-over-erosion (EOE) phenomena for fine metal line array structures
can be investigated.
New W
CMP Plug Patterned Wafer, November 2004
SKW 5PB has been introduced as our new W CMP plug patterned wafer. Based
upon the RAM 9 mask, SKW 5PB
possesses a plug size of 0.15µm. Please contact SKW Associates,
INC. for further details.
SKW Associates'
ChampiAn Software Has Been Integrated into PSIA
XE-300P Long Range Scan Atomic Force Profiler, September 2004
Since July of 2003, SKW Associates has been working with PSIA Corporation
to integrate ChampiAn software into PSIA XE-300P long range scan atomic
force profiler. This new "intelligent" long range profiler for
CMP process characterization has been commercially available since May
of 2004. Please click here for
further information related to this "intelligent" integrated
profiler.
Daisy
Chain Test Patterned Wafers For Packaging Process Development, September
2004
Various daisy chain test patterned wafers for packaging process development
and equipment qualifications are available. These three metal/ three dielectric
layer test patterned wafers are designed to establish packaging industry-wide
package testing methodologies. The wafers for both flip chip and wire
bonding packaging technologies are available. Please click
here for further information.
New
Cu CMP Test Patterned Wafer SKW 6-3
(0.13 mm) Cu/BD and SKW 6-3
(0.13 mm) Cu/BD/SiON Capping Layer, July 2004
These advanced Cu/low-k integrated wafers for 90nm technology node are
designed to characterize both planarity and defectivity evaluations. Die
size is 20mm x 20mm and both types of wafers contain single level Cu line
patterns. Minimum design rule of the Cu line is 130nm. These wafers were
processed using 193nm lithography technology.
2"
CMP Test Patterned Wafers, July 2004
Low cost and high quality 2" CMP test patterned wafers for oxide,
STI, W, Cu/TEOS and CU/Black Diamond CMP process development are now available.
Please click here for further information
related to this new innovative wafer product.
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